Background Deep neural networks (DNNs) have been used in many different applications in recent years for pattern recognition and data mining, and are widely considered to be the dominant algorithmic framework in machine learning. However, DNNs are computationally and energetically intensive algorithms that perform billions of floating-point operations...

A substantial part of high energy consumption (> 60%) and large latency (> 90%) of conventional von-Neumann architectures can be attributed to the unavoidable data movement between the processor and main memory (DRAM). This is perhaps the major limiting factor for big data and machine learning applications whose usage is permeating into practically...

Synchronous logic remains the dominant design paradigm of digital systems such as Application Specific Integrated Circuits (ASICs). The conventional design of sequential circuit networks is based on the assumption that every register receives the clock signal at the same time. However, guaranteeing the simultaneity of clock arrival times in practice...

Invention Description Implementation of lookup tables (LUTs) in a field-programmable gate array (FPGA) comes at the heavy cost of area, power, and performance. Researchers at Arizona State University have developed an alternative FPGA tile structure that consists of three traditional LUTs combined with a new reconfigurable threshold logic cell (TLC)....